The ADMS package translates the Verilog-A model description into a set of C++ files, which are then compiled into a loadable module (a shared library loaded on demand).
There may be some documentation of ADMS on the internet. Last I looked, there was very little, but is included with the XicTools version of ADMS. One should also google-up a copy of the Verilog-A manual, as this describes the official syntax.
This section is a catch-all for information about the WRspice ADMS implementation, with regard to syntax and features.