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The source Command

The source command is used to load circuit files and command scripts.

source [-r] [-n] [-c] file [file ...]
If more than one file name is given, the files will be concatenated into a temporary file, which is read. The command will read and process circuit descriptions and command text from the file(s). If .newjob lines are found within the files, the input will be partitioned into two or more circuit decks, divided by the .newjob lines. Each circuit deck is processed independently and in sequence.

If a file does not have a path prefix, it is searched for in the search path specified by the sourcepath variable. If not in the search path or current directory, a full path name must be given.

The source command is internet aware, i.e., if a given filename has an ``http://'' or ``ftp://'' prefix, the file will be downloaded from the internet and sourced. The file is transferred as a temporary file, so if a permanent local copy is desired, the edit or listing commands should be used to save the circuit description to disk.

When an input file or set of files is ``sourced'', the following steps are performed for each circuit deck found. The logic is rather complex, and the following steps illustrate but perhaps oversimplify the process. In particular, the subcircuit/model cache substitution is omitted here.

  1. The input is read into a ``deck'' in memory. Line continuation is applied.

  2. In interactive mode, the title line from the circuit is printed on-screen, unless the noprtitle variable is set, in which case this printing is suppressed. The variable can be set by checking the box in the source page of the Command Options tool from the Tools menu.

  3. The deck is scanned for .param lines which are outside of subcircuit definitions. These are shell expanded, and used to evaluate .if, .elif and similar lines. Lines that are not in scope are ignored.

  4. Files referenced from .include and .lib lines are resolved and read. At each level, parameters are scanned again, so that .if, etc. lines do the right thing at each level.

  5. Verilog blocks, .exec blocks, and .control blocks are moved out of the main deck into separate storage.

  6. The .exec lines, if any, are executed by the shell.

  7. The .options lines are extracted, shell expanded, and evaluated. During evaluation, the shell receives the assignment definitions.

  8. The remaining lines in the deck are shell expanded.

  9. Subcircuit expansion is performed. This takes care of parameter expansion within subcircuit definition blocks.

  10. The circuit (if any) is parsed, and added to the internal circuits list.

  11. The .control lines, if any, and executed by the shell.

After a source, the current circuit will be the last circuit parsed.

There are three option flags available, which modify the behavior outlined above. These can be grouped or given as individual tokens, following a `-' character. Note that if a file name starts with `-', it must be quoted with double-quote marks. The options are applied before files are read.

r
Reuse the current circuit. The current circuit is destroyed before the new circuit is created, which becomes the current circuit. This option is ignored if -n is also given.

n
Ignore any circuit definition lines in input. Executable lines will still be executed, but no new circuit will be produced.

c
Ignore any .control commands. However, .exec lines will still be executed.

n and c
If both of the n and c options are given, all lines of input except for the first ``title'' line are taken to be executable, and are executed, as if for a startup file.



Subsections
next up previous contents index
Next: Implicit Source Up: Input and Output Commands Previous: The sced Command   Contents   Index
Stephen R. Whiteley 2017-10-02