Types of Analysis

Like its predecessors, * WRspice* supports various forms of nonlinear
dc, nonlinear transient, and linear ac analyses.

- DC Analysis

The dc analysis portion ofdetermines the dc operating point of the circuit with inductors shorted and capacitors opened. A dc analysis is automatically performed prior to a transient analysis to determine the transient initial conditions, and prior to an ac small-signal analysis to determine the linearized, small-signal models for nonlinear devices. The dc analysis can also be used to generate dc transfer curves: a specified independent voltage or current source is stepped over a user-specified range and the dc output variables are stored for each sequential source value. In*WRspice*, dc analysis can be combined with other analysis types to generate a family of analysis results representing data from each point of the dc analysis. The dc analysis is not available if Josephson junctions are present in the circuit.*WRspice* - AC Analysis

The ac small-signal portion ofcomputes the ac output variables as a function of frequency. The program first computes the dc operating point of the circuit and determines linearized, small-signal models for all of the nonlinear devices in the circuit. The resultant linear circuit is then analyzed over a user-specified range of frequencies. The desired output of an ac small-signal analysis is usually a transfer function (voltage gain, transimpedance, etc). If the circuit has only one ac input, it is convenient to set that input to unity and zero phase, so that output variables have the same value as the transfer function of the output variable with respect to the input. The ac analysis can be combined with a dc sweep so that ac analysis is performed at each point over a range of bias conditions. The ac analysis is not available on circuits containing Josephson junctions.*WRspice* - Transient Analysis

The transient analysis portion ofcomputes the transient output variables as a function of time over a user-specified time interval. The initial conditions can be automatically determined by a dc analysis. All sources which are not time dependent (for example, power supplies) are set to their dc value. If Josephson junctions are present, or if the*WRspice*`uic`option is given, initial conditions are assumed at the start of analysis rather than the result of the dc operating point analysis. With Josephson junctions, all sources should start with zero output. Transient analysis can be combined with a dc sweep so that the transient simulation is performed at each point over a range of bias conditions. - Transfer Function Analysis

The transfer analysis portion ofcomputes the dc or ac small signal transfer function, input impedance, and output impedance of a network. For ac analysis, the dc operating point is automatically determined through an operating point analysis. The transfer analysis can be combined with a dc sweep so that the transfer function is computed at each point over a range of bias conditions.*WRspice* - Pole-Zero Analysis

The pole-zero analysis portion ofcomputes the poles and/or zeros in the small-signal ac transfer function. The program first computes the dc operating point and then determines the linearized, small-signal models for all the nonlinear devices in the circuit. This circuit is then used to find the poles and zeros. Two types of transfer functions are allowed: one of the form*WRspice*(

and the other of the form*output_voltage*)/(*input_voltage*)*(output_voltage)/(input_current).* - Distortion Analysis

The distortion analysis portion ofcomputes steady-state harmonic and intermodulation products for small input signal magnitudes. If signals of a single frequency are specified as the input to the circuit, the complex values of the second and third harmonics are determined at every point in the circuit. If there are signals of two frequencies input to the circuit, the analysis finds the complex values of the circuit variables at the sum and difference of the input frequencies, and at the difference of the smaller frequency from the second harmonic of the larger frequency. Distortion analysis can be combined with a dc sweep so that distortion is analyzed at each point over a range of bias conditions.*WRspice*Distortion analysis is supported for the following nonlinear devices: diodes, bipolar transistors, JFETs, MOS1-4, MESFETs. All linear devices are automatically supported by distortion analysis. If there are switches present in the circuit, the analysis continues to be accurate provided the switches do not change state under the small excitations used for distortion analysis.

- Sensitivity Analysis

will calculate either the DC operating-point sensitivity or the AC small-signal sensitivity of an output variable with respect to all circuit variables, including model parameters.*WRspice*calculates the difference in an output variable (either a node voltage or a branch current) by perturbing each parameter of each device independently. Since the method is a numerical approximation, the results may demonstrate second-order effects in highly sensitive parameters, or may fail to show very low but non-zero sensitivity. Further, since each variable is perturbed by a small fraction of its value, zero-valued parameters are not analyzed (this has the benefit of reducing what is usually a very large amount of data). Sensitivity analysis can be combined with a dc sweep so that sensitivity can be analyzed at each point over a range of bias conditions.*WRspice* - Noise Analysis

The noise analysis portion ofperforms analysis of device-generated noise for the given circuit. When provided with an input source and an output node, the analysis calculates the noise contributions of each device (and each noise generator within the device) to the output node voltage. It also calculates the level of input noise from the specified input source to generate the equivalent output noise. This is done for every frequency point in a specified range -- the calculated value of the noise corresponds to the spectral density of the circuit variable viewed as a stationary Gaussian stochastic process. Noise analysis can be combined with a dc sweep so that noise can be computed at each point over a range of bias conditions.*WRspice*After calculating the spectral densities, noise analysis integrates these values over the specified frequency range to arrive at the total noise voltage/current (over this frequency range). This calculated value corresponds to the variance of the circuit variable viewed as a stationary Gaussian process.

- Operating Range Analysis

has an integrated two-dimensional operating range analysis capability. The operating range analysis mode is used in conjunction with the other analysis types, such as transient or ac. A suitably configured source file and circuit description is evaluated over a one or two dimensional area of parameter space, producing (optionally) an output file describing the results at each evaluated point, or vectors giving the minimum and maximum values of the varying parameters for operation. Results can be viewed graphically during or after simulation.*WRspice* - Monte Carlo Analysis

has a built-in facility for performing Monte Carlo analysis, where one or more circuit variables are set according to a random distribution, and the circuit analyzed for functionality. The file format and operation is very similar to operating range analysis.*WRspice* - Automated Looping

In, any analysis can be automatically repeated while stepping over a one or two dimensional area of parameter space. Any circuit parameter may be varied.*WRspice*

Both dc and transient solutions are obtained by an iterative process which is terminated when both of the following conditions hold:

- The nonlinear branch currents converge to within a tolerance of 0.1 percent or 1 picoamp (1.0E-12 Amp), whichever is larger.
- The node voltages converge to within a tolerance of 0.1 percent or 1 microvolt (1.0E-6 Volt), whichever is larger.

Although the algorithm used in * WRspice* has been found to be very
reliable, in some cases it will fail to converge to a solution. When
this failure occurs, the program will terminate the job.

Failure to converge in dc analysis is usually due to an error in
specifying circuit connections, element values, or model parameter
values. Regenerative switching circuits or circuits with positive
feedback probably will not converge in the dc analysis unless the `off`
option is used for some of the devices in the feedback path, or the
`.nodeset` card is used to force the circuit to converge to the desired
state.

See the section describing operating point analysis (2.7.6) for a detailed description of the algorithms and information on convergence issues.

* WRspice* runs can consume quite a bit of virtual memory, and it is
possible to exceed machine limits on many systems. The main consumer
of memory is the data arrays from simulation runs. Each point is a
double precision number requiring 8 bytes. Typically, all nodes and
branch currents are saved, though this can be changed with the

The maximum memory that can be used for plot data storage for a single
run is set by the *maxdata* variable. The **Tool Control**
window displays memory statistics, and can be used to keep track of
memory in use.

The vectors are copied when a plot is produced (including iplots), thus this additional memory must be available for plots to be displayed. In addition, iplots with a large number of data points (more than about 10000) can noticeably slow the simulation run.

The **free** and **destroy** commands can be used to delete
existing plots, making the memory available for other purposes. The
**rusage** command displays memory usage and memory limits. Note
that once * WRspice* obtains memory from the operating system, on many
systems this memory is never returned. Thus, the

Exceeding virtual memory limits is not in general a fatal error, depending on when the error occurs. Plots and iplots allocate all memory needed at the beginning of the operation, so an out of memory condition will usually abort the operation and return the command prompt. It is possible, though, for further errors to be generated by a memory failure which may cause a segmentation fault.