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Assigning Design Rules

Design rules can be added to the technology file by hand with a text editor, or from within Xic using the Edit Rules pop-up panel in the DRC Menu. Note that if macros or the eval construct are to be used in design rules, the text must be inserted with a text editor, as these constructs are unknown to the Edit Rules pop-up.

Xic supports a set of design rule primitives which should cover the vast majority of cases encountered in process technology specifications. In addition, more specialized tests can be developed through use of user-defined design rules, described in 15.5.

Most simple specifications translate directly into a rule keyword, in particular, the setting of MinWidth and MinSpace are usually straightforward. MinWidth is generally the smallest feature size allowable on the layer, and MinSpace is the smallest gap allowed between features on the layer. Note that if one feature touches another on the same layer, the tests are applied such that the combined features are measured. Thus it is legitimate to have subdimensional features, as long as they are directly adjacent to other features so that the combined dimensions satisfy the MinWidth test.

There are six rules which flag overlapping of layers Overlap, IfOverlap, NoOverlap, AnyOverlap, PartOverlap, and AnyNoOverlap. Of these, the first three are by far the most commonly used. If objects on layer A should always be over/under layer B, the Overlap rule should be added to layer A. If objects on layer A should never intersect layer B, the NoOverlap rule should be applied to layer A. The case of coincident layer A and B edges of adjacent objects will not produce an error, unless an additional MinSpaceTo test is applied. If objects on layer A should either be entirely covered by layer B, or not intersect layer B at all, the IfOverlap rule should be added to layer A. In this test, if an object on layer A partially intersects layer B, an error is generated. This is useful for ensuring that a feature does no cross an underlying edge, for example.

In reciprocal rules, such as MinSpaceTo, which specifies the minimum distance between objects on two different layers, it is often questioned whether the rule should be specified in each layer. The answer is no, although no real harm is done if it is specified in both layers, though both specifications had better provide the same dimension. In testing of a newly created object (interactive DRC), first the object is tested with respect to rules defined on the object's layer. If there are no errors, all nearby objects which have a rule target of the object's layer are tested, and any errors are flagged on the new object. For example if a box on layer A is created too close to a box on layer B, and B contains a MinSpaceTo rule with respect to layer A, first the A box is tested (result: ok) then the B box is tested, (result: failure due to proximity to A). The A box is marked and the error region is indicated. In batch mode testing, only the rules for a given object are evaluated. Typically, all objects in the region are tested, so the error will be caught. If there were specifications on each layer, there would be two error messages produced, as two separate but redundant tests would be performed. In the MinSpaceTo test, the condition where edges are coincident is flagged as an error, however if the two objects are actually intersecting with nonzero area, no error is generated from the MinSpaceTo test.

The word ``overlap'' is confusingly used in two contexts. In process specifications, the ``overlap'' is often taken as the width of material surrounding a feature, such as a via. In the Xic documentation, ``overlap'' often refers to an area of mutual intersection of two (or more) different layers. As an important example, a process specification might read ``overlap of M1 around VIA 1.0 micron''. This implies that layer M1 must extend 1.0 microns or more outside of the VIA feature. One way to test this condition is with the MinNoOverlap keyword as a rule on M1: ``MinNoOverlap VIA 1.0''. This specifies that a region along the outside edge of M1 1 micron in width toward the inside of the M1 feature will be checked for the presence of VIA, and an error will occur if any VIA material is found intersecting with this region. The MinNoOverlap test will flag as an error the case where the edges of the two intersecting objects are coincident, however if the VIA area actually encloses M1, no error is generated. The Overlap and IfOverlap keywords can be used to detect this circumstance. Often, the process specification will list such a rule with the interior feature layer (VIA), in which case it makes more sense to use the MinSpaceFrom test as in ``MinSpaceFrom M1 1.0'' applied to the VIA layer. This specifies that a region projecting outward from the VIA feature by 1 micron should be entirely covered by M1. This is almost equivalent to the MinNoOverlap test, however the treatment of the corners is different. This is illustrated in Figure 15.14.

Figure 15.14: The MinSpaceFrom and MinNoOverlap tests differ in the treatment of the corner regions projecting outward from the central feature, as shown.
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In the case of coincident vias, where the order is not important but the concentric spacing must be greater than some value, mutual MinNoOverlap rules can exist in each layer. In the case where one ordering is prohibited, the Overlap or IfOverlap keywords can be used in the inner layer. For example, suppose VIA1 and VIA2 can be concentric, but VIA1 must be outside of (larger than) VIA2. Layer VIA1 would contain a ``MinNoOverlap VIA2'' directive, layer VIA2 would contain an ``IfOverlap VIA1'' directive if VIA2 can exist independently of VIA1, or an ``Overlap VIA1'' directive otherwise. Then, if VIA2 is larger than VIA1, the partial intersection will trigger an error.

The MinOverlap test is used to determine whether the intersection width of two layers is larger than some minimum. It is usually used of conjunction with certain types of contacts or vias, to ensure that the contacting area is sufficiently large. The MinArea and MaxArea tests are also useful is this regard. In particular, to test that a via has an exact size (square), a MinWidth and a MaxArea test are both applied. A MinEdgeLength test is used in the circumstance where the edge-crossing width of a layer is larger than the layer's minimum width.


next up previous contents index
Next: The Setup Button: Set Up: The DRC Menu: Design Previous: User-Defined Design Rules   Contents   Index
Stephen R. Whiteley 2017-11-08