Command Arguments

-f filename
This mandatory argument specifies the input source for batch net extraction. the filename can be a path to a layout file in a supported format, the access name of a CHD in memory, or a path to a saved CHD file.

The technology file in use must match the source file, with the extraction parameters and keywords properly set up.

-c cellname
This provides the name of the top-level cell for extraction. If not given, the top-level cell used will be either the cell configured into the CHD source, if any, or the lowest-offset top-level cell found in the source layout file.

-g gridsize
if the ``-w'' (windowing) option is not given, this sets the grid size, in microns. Use of a grid minimizes memory consumption for handling large designs. For smaller designs gridding may not be necessary, so this option can be skipped or given as 0. In this case the entire bounding box of the top-level cell is understood. The OASIS file is produced, but there are no edge files, and no Stage 2 or Stage 3 steps.

The choice of a grid size is machine and layout dependent. The objective is to choose as large a grid as possible, without exceeding memory limits or causing excessive page-swapping. In general, some experimentation may be required to find the ``best'' grid size. A starting point of 400 microns may be reasonable.

-v
If given, via objects will be included in the netlist cells and files. Via layers are the layers with the Via keyword given in the technology file. The objects on these layers are clipped to the intersection areas of the two associated conductors.

-v+
This is similar to -v, but in addition the ``check layers'' (if any), clipped to the via object, will also be included in net cells and files. The check layers are the layers used in the optional layer expression supplied on the Via line. This expression must be ``true'' for a via object to actually represent a connection. With -v given, the included vias are those that pass the check criteria, but the check layers are not included. With -v+, the check layers will be included.

If the generated netlist file is read back into Xic and extraction run, the -v+ option will allow the nets to be correctly re-extracted. If the check layers are missing, this may fail, and extraction would certainly fail if vias are not included at all.

-vs
When there is no windowing or gridding in use and this option is given, standard vias will be retained as they are rather than being converted to equivalent geometry. The net cells will contain the standard via placements from the net, from all hierarchy levels, as subcells. Presently, this requires that the standard via sub-masters not be included in the source layout file, i.e., they are created within Xic as the file is read.

-w l,b,r,t
If a window is given, a grid size should not be given and will be ignored. In this case, there is no grid, and the rectangular area given, as comma-separated dimensions in microns, is read into memory and processed as if it were a grid cell. The OASIS file is produced, but there are no edge files, and no Stage 2 or Stage 3 steps. If all values are 0, the effective area is the bounding box of the top-level cell, which is the default when no area or grid is given.

-b basename
This supplies a basename for the generated files. It can have a path prefix, which will cause the generated files to be written in the given directory, which must exist. If this argument is not given, the name of the top-level cell is used as the basename.

-nf
By default, in Stage 3 processing, the net cells will be flat. If this argument is given, subnets will appear is cell instances in the ``primary'' net cell.

-nc
This will turn off compression in OASIS output files. This is not a good idea, unless compression is not supported by the reader.

-ne
This turns off the part of the extraction that recognizes device structures, leaving only conductor grouping for connectivity determination. This may be fine for some applications, and avoids computation. In MOS circuits, for example, if the Active layer is assumed to be a conductor, then all FETs will be shorted, drain to source. However, using a Conductor Exclude directive for Poly on Active should fix this.

-l
If this is given, when the flat data are read into memory for processing, any existing layer filtering is kept. Without this option, when -ne is not given, all layers are read since these may affect device recognition. When -ne is given, only Conductor and Via layers are read.

-k
If given, all working files are retained. Without this option, edge files, etc. are deleted when no longer needed.

-s1
If given, the operation will stop at the end of Stage 1.

-s2
If given, the operation will stop at the end of Stage 2.

The grid cells are assigned x,y index numbers, according to position, with the 0,0 cell located in the lower left corner. The cells are traversed left to right by row, from bottom to top. Each net in a grid is assigned a number, which is the group number from extraction. All three numbers are non-negative, and the triplets represent a unique designation for a subnet. The net cells in the Stage 1 OASIS files files are names ``x_y_n'', i.e., the three numbers separated by underscores.

In the final OASIS file, the net cells are renamed n1, n2, ..., replacing the triples with an index number. If instantiation is used, the subnet cells that are not primary nets retain the original names. The primary subnet from among a group of connected subnets is the one that is lowest in ``traversal order'', which is the lowest group number in the first grid cell seen in a sweep left to right in the rows, ascending in y.