The eclectical mode of Xic allows a schematic representation of the cell to be entered. This electrical representation is used to generate a SPICE file for simulation purposes, by WRspice or another simulator. The electrical representation can be generated or updated from the physical layout, if extraction has been properly set up, and can be compared with the physical representation to identify wiring errors.
The electrical representation of a hierarchy of cells follows the same hierarchy as the physical cells, for the most part. Physical cells that contain wire only, i.e., no devices or subcircuits, generally do not have an electrical-mode counterpart. Such cells are effectively flattened into their parents in the electrical representation. The physical implementation of devices can include structure from subcells. In this case, the electrical implementation of the device is in the electrical cell corresponding to the top-level physical cell containing the device geometry.
One does not need a physical representation in order to use electrical mode. In this case, Xic is used exclusively as a schematic capture front-end for WRspice or another SPICE-compatible simulator.
This section will focus on the mechanics of schematic entry and simulation using WRspice. The chapter on extraction (16) will provide detail on how the electrical and physical data can be made to interact.
To produce a schematic cell, one follows this basic outline:
The following sections will describe these steps in more detail.
A prerequisite for using electrical mode is basic knowledge of the SPICE syntax and SPICE file format. One does not need to be an expert, but a certain proficiency is assumed for such steps as property setting. It is recommended that users unfamiliar with SPICE skim the WRspice manual or other reference.